The disclosed embodiments relate to a semiconductor fabrication technology, and more particularly to a method for fabricating a fine pattern in a semiconductor device.
As a semiconductor device is becoming highly integrated, a thickness and height difference of an etching target layer during a photolithography process are increasing. In order to pattern such a thick etching target layer, a photoresist used as an etch mask should be sufficiently thick. However, it is difficult to form the photoresist thickly and it is difficult to meet conditions such as depth of focus (DOF) during an exposure process in accordance with increasing for the thickness of the photoresist pattern.
Therefore, in the photolithography process for patterning a thick material layer just like a contact hole forming process, technologies have been introduced which use a material layer having a low etch selectivity with respect to the photoresist as a hard mask.
Meanwhile, among hard mask materials, amorphous carbon is mostly considered because of a low etch selectivity with respect to an insulation layer such as a silicon oxide layer.
FIGS. 1A to 1D illustrate a typical method for fabricating a fine pattern.
Referring to FIG. 1A, an amorphous carbon layer 12 having a thickness of approximately 2,000 Å to approximately 4,000 Å is formed over a substrate 10 where an interlayer insulation layer 11 such as a silicon oxide layer is formed as an etch target layer. A silicon oxynitride layer (SiON) 13 having a thickness of approximately 400 Å to approximately 600 Å is formed over the amorphous carbon layer 12. An organic bottom anti-reflective coating (BARC) 14 is formed over the silicon oxynitride layer 13, and a photoresist 15 having a thickness of approximately 10,000 Å is formed over the bottom anti-reflective coating 14.
Referring to FIG. 1B, a photoresist pattern 15A is formed by sequentially performing a soft bake process, an exposure process using a photo mask, a post-exposure bake (PEB) process, and a development process.
Referring to FIG. 1C, an O2 plasma etching process is performed to pattern up to the amorphous carbon layer 12. Reference numerals 13A and 12A represent a patterned silicon oxynitride layer and a patterned amorphous carbon layer, respectively. The photoresist pattern 15A and the bottom anti-reflective coating 14 are removed during the O2 plasma etching process. During this process, the silicon oxynitride layer 13A serves to prevent damage of the amorphous carbon layer 12A.
Referring to FIG. 1D, a dry etching process is performed on the interlayer insulation layer 11 using the amorphous carbon layer 12A as an etch mask. Therefore, interlayer insulation patterns 11A are formed, then the remaining silicon oxynitride layer 13A and amorphous carbon layer 12A are removed.
If a fine pattern forming process is performed using the amorphous carbon layer as a hard mask, it is possible to ensure an excellent profile of the fine pattern due to the low etch selectivity of the amorphous carbon layer.
However, since the amorphous carbon layer is formed by not a coating method but a deposition method, it is deposited all over the wafer. Therefore, it is necessary to perform a bevel etching process for removing the amorphous carbon layer formed on an edge portion of the wafer.
Furthermore, since the amorphous carbon layer has a very high light absorption, it is necessary to open an alignment key for a mask alignment in an exposure apparatus. During the mask alignment, a method for irradiating light and detecting a reflected secondary light is used. However, as described above, since the amorphous carbon layer has the very high light absorption, it is difficult to detect the alignment key. Therefore, it is necessary to perform an additional mask process and etching process for removing the amorphous carbon layer formed on the alignment key after forming the amorphous carbon layer.